Sun Mar 05 16:04:08 2000 file shutter8.lis page 1 ST6 MACRO-ASSEMBLER version 4.50 - July 1996 Sun Mar 05 16:04:08 2000 file shutter8.lis page 2 --- SOURCE FILE : shutter8.asm --- 1 1 ;***************************************************************************** 2 2 ;* shutter8.asm * 3 3 ;* The Shutter Project, AST6 Macro-Assembler source * 4 4 ;* Mar 05, 2000 * 5 5 ;***************************************************************************** 6 6 ; Copyright 2000 by Georg Holderied and Markus Karrer Ostermayer 7 7 ; 8 8 ; Purpose: software control of a photo shutter, providing automatic 9 9 ; and manual time modes, including self timer. 10 10 ; 11 11 ; Version: 0.8 beta, written for AST6 Macro Assembler Version 4.50 12 12 ; 13 13 ; Warning: contains time dependent code, relying on a 4.000 MHz clock ! 14 14 ; When using different crystals, scale delay subroutines accordingly. 15 15 ; Note: at 4 MHz, one machine cycle takes 3.25 Microseconds 16 16 ;|===========================================================================| 17 17 ;| Assembly method without linker : ast6 -l -e shutter7.asm | 18 18 ;|===========================================================================| 19 19 ; 20 20 ;|===========================================================================| 21 21 ;| Assembly directives | 22 22 ;|===========================================================================| 23 23 .display "Now assembling Version 0.8 beta !" 24 24 .title "SHUTTER PROJECT" ; Define title for page header 25 25 .comment 80 26 26 27 27 .DP_ON ;data space is segmented in pages 28 28 .PP_ON ;program space is segmented in 2K pages 29 29 .W_ON ;data space window to program space 30 30 .romsize 4 31 31 .VERS "ST6225" ;has 4K ROM 32 32 33 33 ;|---------------------------------------------------------------------------| 34 34 ;| ST6225 Registers Declaration | 35 35 ;| | 36 36 ;|---------------------------------------------------------------------------| 37 37 38 38 x .def 80h ; Index register. 39 39 y .def 81h ; Index register. 40 40 v .def 82h ; Short direct register. 41 41 w .def 83h ; Short direct register. 42 42 a .def 0ffh ; Accumulator. 43 43 dra .def 0c0h ; Port a data register. 44 44 drb .def 0c1h ; Port b data register. 45 45 drc .def 0c2h ; Port c data register. 46 46 ddra .def 0c4h ; Port a direction register. 47 47 ddrb .def 0c5h ; Port b direction register. 48 48 ddrc .def 0c6h ; Port c direction register. 49 49 opra .def 0cch ; Port a option register. 50 50 oprb .def 0cdh ; Port b option register. 51 51 oprc .def 0ceh ; Port c option register. 52 52 ior .def 0c8h ; Interrupt option register. 53 53 drwr .def 0c9h ; Data rom window register. 54 54 adr .def 0d0h ; A/D data register. 55 55 adcr .def 0d1h ; A/D control register. 56 56 psc .def 0d2h ; Timer prescaler register. 57 57 tcr .def 0d3h ; Timer counter register. 58 58 tscr .def 0d4h ; Timer status control register. 59 59 wdr .def 0d8h ; Watchdog register. Sun Mar 05 16:04:08 2000 file shutter8.lis page 3 SHUTTER PROJECT 60 60 61 61 ; ******************************* 62 62 ; * Program work variables and * 63 63 ; * declarations (as one byte * 64 64 ; * dataspace addresses) * 65 65 ; ******************************* 66 66 67 67 DATARAM .equ 084h ; base data ram address 68 68 69 69 d128fac .def DATARAM ; factor for the delay_128 subroutine 70 70 c_copy .def DATARAM+1 ; copy of c port for safe data transition 71 71 I .def DATARAM+2 ; 1st loop counter, general purpose 72 72 K .def DATARAM+3 ; 2nd loop counter, general purpose 73 73 b1 .def DATARAM+4 ; for setting of BCD 1st digit (B3-B0) 74 74 b2 .def DATARAM+5 ; for setting of BCD 2nd digit (A7-A4) 75 75 b3 .def DATARAM+6 ; for setting of BCD 3rd digit (A3-A0) 76 76 num_sec .def DATARAM+7 ; to hold a requested delay in seconds 77 77 num_ms .def DATARAM+8 ; to hold a requested delay in ms 78 78 err_flag .def DATARAM+9 ; to flag a bad switch setting 79 79 ENDRAM .EQU DATARAM+10 ; end of data ram address range 80 80 81 81 ; 82 82 ;|===========================================================================| 83 83 ;| constants definition | 84 84 ;|===========================================================================| 85 85 ; 86 86 ;bit positions 87 87 ; 88 88 button .equ 7 ; bit #7 (PC7) = shutter button input 89 89 led_stat .equ 6 ; bit #6 (PC6) = status (yellow led) out 90 90 flash .equ 5 ; bit #5 (PC5) = flash sync (pink led) out 91 91 shuttr .equ 4 ; bit #4 (PC4) = shutter output (red led) 92 92 tmz .equ 7 ; timer zero bit, clear before timer count 93 93 94 94 ; *************************** 95 95 ; * MAIN PROGRAM * 96 96 ; *************************** 97 97 98 98 .section 1 ; logical partitioning of program space 99 P01 0800 0DD8FE P01 0800 99 init ldi wdr,0feh ; Load the watchdog with max. divider (64) 100 P01 0803 0D8500 P01 0803 100 clr c_copy ; 101 P01 0806 0D8800 P01 0806 101 clr b1 ; clear the BCD switch setting save posn 102 P01 0809 0D8900 P01 0809 102 clr b2 ; 103 P01 080C 0D8A00 P01 080C 103 clr b3 ; 104 P01 080F 0D8B00 P01 080F 104 clr num_sec ; clear seconds delay preset 105 P01 0812 0D8D00 P01 0812 105 clr err_flag ; clear error flag (no error) 106 P01 0815 0DCC00 P01 0815 106 ldi opra,00000000b ; Port A is with pull up 107 P01 0818 0DC400 P01 0818 107 ldi ddra,00000000b ; Port A is all input (0=In 1=Out) 108 P01 081B 0DC000 P01 081B 108 ldi dra,00000000b ; Port A is witout interrupt 109 109 110 P01 081E 0DCD00 P01 081E 110 ldi oprb,00000000b ; Port B is with pull up 111 P01 0821 0DC500 P01 0821 111 ldi ddrb,00000000b ; Port B is all input 112 P01 0824 0DC100 P01 0824 112 ldi drb,00000000b ; Port B is without interrupt 113 113 114 P01 0827 0DCE7F P01 0827 114 ldi oprc,01111111b ; Port C options (PC7 no interrupt) 115 P01 082A 0DC67F P01 082A 115 ldi ddrc,01111111b ; Port C directions (PC7 is input) 116 116 ; Port C6 is status led output 117 117 ; Port C5 is flash sync output 118 118 ; Port C4 is shutter output 119 P01 082D 4D P01 082D 119 reti ; end of reset process, pg continues... Sun Mar 05 16:04:08 2000 file shutter8.lis page 4 SHUTTER PROJECT 120 120 ; with next instruction 121 P01 082E 0DD8FE P01 082E 121 ldi wdr,0feh ; Load the watchdog 122 P01 0831 A191 P01 0831 122 call res_ok ; reset blinks status LED 3 times 123 123 ;********************************************* / *********** 124 124 ;*** WAIT HERE FOR SHUTTER BUTTON USE in endle / ss LOOP * 125 125 ;********************************************* / *********** 126 P01 0833 0D8800 P01 0833 126 waitbutn clr b1 127 P01 0836 0D8900 P01 0836 127 clr b2 128 P01 0839 0D8A00 P01 0839 128 clr b3 129 P01 083C 0D8B00 P01 083C 129 clr num_sec 130 P01 083F 0DD8FE P01 083F 130 ldi wdr, 0feh ; prevent timeout of watchdog 131 P01 0842 1FC2 P01 0842 131 ld a, drc ; load drc port 132 P01 0844 9F85 P01 0844 132 ld c_copy, a ; copy drc port to c_copy 133 P01 0846 E38502 P01 0846 133 jrr button,c_copy,readMode ; shutter button pressed? ->read Mode sw / 134 P01 0849 3983 P01 0849 134 jp waitbutn ; else loop endlessly 135 135 136 136 ;********************************************* / ***** 137 137 ;comes here after shutter button on PC7 is pre / ssed 138 138 ;in order to read the HEX switch (for mode inf / o) 139 139 ;HEX mode switch is on B7,B6,B5,B4 pins (8/4/2 / /1) 140 140 ;********************************************* / ***** 141 P01 084B 1FC1 P01 084B 141 readMode ld a,drb ; read Port B 142 P01 084D B7F0 P01 084D 142 andi a,11110000b ; mask the 4 LSB's of the Hex code sw. 143 P01 084F 10 P01 084F 143 rH6 jrnz cp_B ; acc is not zero 144 P01 0850 898F P01 0850 144 jp self30 ; HEX switch is set to"F-self timer 30s" 145 P01 0852 3740 P01 0852 145 cp_B cpi a,01000000b ; compare with "B" 146 P01 0854 14 P01 0854 146 jrz bmode ; HEX switch is set to "Manual mode" 147 P01 0855 E986 P01 0855 147 jp rH1 148 148 ;********************************************* / ********** 149 149 ;MANUAL mode (open shutter as long as button i / s pressed) 150 150 ;********************************************* / ********** 151 P01 0857 F19A P01 0857 151 bmode call ShutH ; OPEN SHUTTER 152 P01 0859 0D8C3C P01 0859 152 ldi num_ms,60 ; load ms preset 153 P01 085C C198 P01 085C 153 call delay_ms ; debounce time delay 60ms 154 P01 085E 0DD8FE P01 085E 154 monitor ldi wdr,0feh ; Load the watchdog with max. divider (64) 155 P01 0861 1FC2 P01 0861 155 ld a,drc ; load c port contents 156 P01 0863 9F85 P01 0863 156 ld c_copy, a ; copy port contents 157 P01 0865 F38502 P01 0865 157 jrs button,c_copy,b_end ; if button is off (port HI) now, go b_end 158 P01 0868 E985 P01 0868 158 jp monitor ; button is still pressed (port LO),wait 159 P01 086A 419A P01 086A 159 b_end call ShutL ; CLOSE SHUTTER 160 P01 086C 3983 P01 086C 160 jp waitbutn ; return to read shutter button 161 P01 086E 3730 P01 086E 161 rH1 cpi a,00110000b ; compare with "C" 162 P01 0870 14 P01 0870 162 jrz tmode ; HEX switch is set to "Toggle mode" 163 P01 0871 6989 P01 0871 163 jp rH2 164 164 ;********************************************* / ********** 165 165 ;TOGGLE mode (press to open shutter, again to / close it) Sun Mar 05 16:04:08 2000 file shutter8.lis page 5 SHUTTER PROJECT 166 166 ;********************************************* / ********** 167 P01 0873 0DD8FE P01 0873 167 tmode ldi wdr,0feh ; Load the watchdog with max. divider (64) 168 P01 0876 F19A P01 0876 168 call ShutH ; OPEN SHUTTER 169 P01 0878 17FF P01 0878 169 ldi a,255 170 P01 087A 9F8C P01 087A 170 ld num_ms,a 171 P01 087C C198 P01 087C 171 call delay_ms ; delay for 255ms 172 P01 087E C198 P01 087E 172 call delay_ms ; delay for another 255ms to release butn 173 P01 0880 0DD8FE P01 0880 173 moni_2 ldi wdr,0feh ; Load the watchdog with max. divider (64) 174 P01 0883 1FC2 P01 0883 174 ld a,drc ; load c port contents 175 P01 0885 9F85 P01 0885 175 ld c_copy, a ; copy port contents 176 P01 0887 F385F6 P01 0887 176 jrs button,c_copy,moni_2 ; button still released (port HI)? 177 P01 088A 419A P01 088A 177 call ShutL ; no, button pressed again, toggle CLOSE 178 P01 088C 17FF P01 088C 178 ldi a,255 179 P01 088E 9F8C P01 088E 179 ld num_ms,a 180 P01 0890 C198 P01 0890 180 call delay_ms ; delay for 255ms 181 P01 0892 C198 P01 0892 181 call delay_ms ; delay for another 255ms before return 182 P01 0894 3983 P01 0894 182 jp waitbutn ; return to read shutter button 183 P01 0896 37F0 P01 0896 183 rH2 cpi a,11110000b ; compare with "0" 184 P01 0898 14 P01 0898 184 jrz smode ; HEX switch is set to "Seconds mode" 185 P01 0899 798A P01 0899 185 jp rH3 ; 186 186 ;********************************************* / ********** 187 187 ;SECONDS mode (shutter AUTOMATIC for XXX secon / ds) 188 188 ;********************************************* / ********** 189 P01 089B 619E P01 089B 189 smode call BCD_sec ; sub reads b1,b2,b3 and calculates 190 190 ; num_secs, opens&closes shutter 191 P01 089D 17FF P01 089D 191 ldi a,255 192 P01 089F 9F8C P01 089F 192 ld num_ms,a 193 P01 08A1 C198 P01 08A1 193 call delay_ms ; delay for 255ms 194 P01 08A3 C198 P01 08A3 194 call delay_ms ; delay for another 255ms before return 195 P01 08A5 3983 P01 08A5 195 jp waitbutn ; to read the button 196 P01 08A7 3750 P01 08A7 196 rH3 cpi a,01010000b ; compare with "A" 197 P01 08A9 14 P01 08A9 197 jrz standard ; HEX switch is set to "Standard mode" 198 P01 08AA 698B P01 08AA 198 jp rH4 ; 199 199 ;********************************************* / ********************* 200 200 ;Standard mode (shutter AUTOMATIC for 1/125,60 / ,30,16,8,4,2,1 sec) 201 201 ;********************************************* / ********************* 202 P01 08AC 91AA P01 08AC 202 standard call BCD_frac ; reads b1,b2 and b3 and calculates 203 203 ; d128fac to determine 1/128's needed 204 204 ; opens & closes shutter 205 P01 08AE 1701 P01 08AE 205 ldi a,1 ; wait 1s 206 P01 08B0 9F8B P01 08B0 206 ld num_sec,a ; before 207 P01 08B2 F197 P01 08B2 207 call delay_s ; returning 208 P01 08B4 3983 P01 08B4 208 jp waitbutn ; to read the button 209 P01 08B6 3720 P01 08B6 209 rH4 cpi a,00100000b ; compare with "D" 210 P01 08B8 14 P01 08B8 210 jrz self10 ; HEX switch is set to "self timer 10s" 211 P01 08B9 598D P01 08B9 211 jp rH5 ; 212 212 ;********************************************* / ********************* 213 213 ;Selftimer mode (10 s & AUTOMATIC for 1/125,60 / ,30,16,8,4,2 seconds) 214 214 ;********************************************* / ********************* 215 P01 08BB 0DD8FE P01 08BB 215 self10 ldi wdr,0feh ; disable watchdog here Sun Mar 05 16:04:08 2000 file shutter8.lis page 6 SHUTTER PROJECT 216 P01 08BE B1A5 P01 08BE 216 call chk_frac ; check for correctness before delaying 217 P01 08C0 1F8D P01 08C0 217 ld a,err_flag ; load the error flag set/reset in sub 218 P01 08C2 24 P01 08C2 218 jrz self1_ok ; if it is clear, the mode is ok 219 P01 08C3 1194 P01 08C3 219 call errStat ; else the setting is incorrect 220 P01 08C5 3983 P01 08C5 220 jp waitbutn 221 P01 08C7 170A P01 08C7 221 self1_ok ldi a,10 222 P01 08C9 9F8B P01 08C9 222 ld num_sec,a 223 P01 08CB 519C P01 08CB 223 call Stat_On ; status warn led on 224 P01 08CD F197 P01 08CD 224 call delay_s ; delay for 10s 225 P01 08CF A19B P01 08CF 225 call Stat_Off ; status warn led off 226 P01 08D1 91AA P01 08D1 226 call BCD_frac ; then normal fractions 227 P01 08D3 3983 P01 08D3 227 jp waitbutn 228 P01 08D5 3710 P01 08D5 228 rH5 cpi a,00010000b ; compare with "E" 229 P01 08D7 14 P01 08D7 229 jrz self20 ; HEX switch is set to "self timer 20s" 230 P01 08D8 498F P01 08D8 230 jp notValid ; other setting 231 231 ;********************************************* / ********************* 232 232 ;Selftimer mode (20 s & AUTOMATIC for 1/125,60 / ,30,16,8,4,2 seconds) 233 233 ;********************************************* / ********************* 234 P01 08DA 0DD8FE P01 08DA 234 self20 ldi wdr,0feh ; disable watchdog here 235 P01 08DD B1A5 P01 08DD 235 call chk_frac ; check for correctness before delaying 236 P01 08DF 1F8D P01 08DF 236 ld a,err_flag ; load the error flag set/reset in sub 237 P01 08E1 24 P01 08E1 237 jrz self2_ok ; if it is clear, the mode is ok 238 P01 08E2 1194 P01 08E2 238 call errStat ; else the setting is incorrect 239 P01 08E4 3983 P01 08E4 239 jp waitbutn 240 P01 08E6 1714 P01 08E6 240 self2_ok ldi a,20 241 P01 08E8 9F8B P01 08E8 241 ld num_sec,a 242 P01 08EA 519C P01 08EA 242 call Stat_On 243 P01 08EC F197 P01 08EC 243 call delay_s ; delay for 20s 244 P01 08EE A19B P01 08EE 244 call Stat_Off 245 P01 08F0 91AA P01 08F0 245 call BCD_frac ; then normal fractions 246 P01 08F2 3983 P01 08F2 246 jp waitbutn 247 P01 08F4 1194 P01 08F4 247 notValid call errStat ; other HEX switch settings invalid 248 248 ; (not 0 or A to F) 249 P01 08F6 3983 P01 08F6 249 jp waitbutn 250 250 ;********************************************* / ********************* 251 251 ;Selftimer mode (30 s & AUTOMATIC for 1/125,60 / ,30,16,8,4,2 seconds) 252 252 ;********************************************* / ********************* 253 P01 08F8 0DD8FE P01 08F8 253 self30 ldi wdr,0feh ; disable watchdog here 254 P01 08FB B1A5 P01 08FB 254 call chk_frac ; check for correctness before delaying 255 P01 08FD 1F8D P01 08FD 255 ld a,err_flag ; load the error flag set/reset in sub 256 P01 08FF 24 P01 08FF 256 jrz self3_ok ; if it is clear, the mode is ok 257 P01 0900 1194 P01 0900 257 call errStat ; else the setting is incorrect 258 P01 0902 3983 P01 0902 258 jp waitbutn 259 P01 0904 171E P01 0904 259 self3_ok ldi a,30 260 P01 0906 9F8B P01 0906 260 ld num_sec,a 261 P01 0908 519C P01 0908 261 call Stat_On ; status led on for self timer warning 262 P01 090A F197 P01 090A 262 call delay_s ; delay for 30s 263 P01 090C A19B P01 090C 263 call Stat_Off ; status led off 264 P01 090E 91AA P01 090E 264 call BCD_frac ; then normal fractions 265 P01 0910 3983 P01 0910 265 jp waitbutn 266 266 267 267 ;|===========================================================================| 268 268 ;| interrupt routines | 269 269 ;|===========================================================================| Sun Mar 05 16:04:08 2000 file shutter8.lis page 7 SHUTTER PROJECT 270 270 271 271 ;************************ 272 272 ;comes here after an NMI* VECTOR 0 273 273 ;************************ 274 P01 0912 04 P01 0912 274 nmi_int nop ; do not use nmi 275 P01 0913 4D P01 0913 275 reti 276 276 277 277 ;************************ 278 278 ;comes here PORT A INT * VECTOR 1 279 279 ;************************ 280 P01 0914 04 P01 0914 280 p_a_int nop ; port a has no int detection 281 P01 0915 4D P01 0915 281 reti 282 282 283 283 ;************************ 284 284 ;comes here PORT BC INT * VECTOR 2 285 285 ;************************ 286 P01 0916 04 P01 0916 286 p_bc_int nop ; port bc have no int detection 287 P01 0917 4D P01 0917 287 reti 288 288 289 289 ;************************ 290 290 ;comes here TIMER INT * VECTOR 3 291 291 ;************************ 292 P01 0918 04 P01 0918 292 tim_int nop ; timer int not used here 293 P01 0919 4D P01 0919 293 reti 294 294 295 295 ;***************************************************************************** 296 296 ;* Subroutines * 297 297 ;***************************************************************************** 298 298 ; 299 299 ;|---------------------------------------------------------------------------| 300 300 ;| res_ok | 301 301 ;|---------------------------------------------------------------------------| 302 302 ;Subroutine res_ok makes 3 blinks on the status led 303 303 ; 304 304 ; 305 P01 091A 0D8703 P01 091A 305 res_ok ldi K,3 ; repeat 3 times 306 P01 091D 0DD8FE P01 091D 306 rok1 ldi wdr, 0feh ; prevent timeout of watchdog 307 P01 0920 1FC2 P01 0920 307 ld a,drc ; load contents of c port 308 P01 0922 9F85 P01 0922 308 ld c_copy, a ; keep copy of c port 309 P01 0924 7B85 P01 0924 309 set led_stat,c_copy ; set status led bit high 310 P01 0926 1F85 P01 0926 310 ld a,c_copy ; load copy in acc 311 P01 0928 9FC2 P01 0928 311 ld drc,a ; write complete port at once 312 312 313 P01 092A 0D8C64 P01 092A 313 ldi num_ms,100 314 P01 092D C198 P01 092D 314 call delay_ms ; delay 100 ms 315 315 316 P01 092F 1FC2 P01 092F 316 ld a,drc ; load contents of c port 317 P01 0931 9F85 P01 0931 317 ld c_copy, a ; keep copy of c port 318 P01 0933 6B85 P01 0933 318 res led_stat,c_copy ; set status led bit low 319 P01 0935 1F85 P01 0935 319 ld a,c_copy ; load copy in acc 320 P01 0937 9FC2 P01 0937 320 ld drc,a ; write complete port at once 321 P01 0939 C198 P01 0939 321 call delay_ms 322 P01 093B FF87 P01 093B 322 dec K 323 P01 093D 08 P01 093D 323 jrnz rok2 ; K > 0 ? 324 P01 093E CD P01 093E 324 ret 325 P01 093F D991 P01 093F 325 rok2 jp rok1 326 326 ; 327 327 ;|---------------------------------------------------------------------------| 328 328 ;| errStat | 329 329 ;|---------------------------------------------------------------------------| Sun Mar 05 16:04:08 2000 file shutter8.lis page 8 SHUTTER PROJECT 330 330 ;Subroutine errStat makes 6 fast blinks on PC5 (status LED) 331 331 ; 332 332 ; 333 P01 0941 0D8706 P01 0941 333 errStat ldi K,6 ; repeat 6 times 334 P01 0944 0DD8FE P01 0944 334 bp1 ldi wdr, 0feh ; prevent timeout of watchdog 335 P01 0947 1FC2 P01 0947 335 ld a,drc ; load contents of c port 336 P01 0949 9F85 P01 0949 336 ld c_copy, a ; keep copy of c port 337 P01 094B 7B85 P01 094B 337 set led_stat,c_copy ; set status led bit high 338 P01 094D 1F85 P01 094D 338 ld a,c_copy ; load copy in acc 339 P01 094F 9FC2 P01 094F 339 ld drc,a ; write complete port at once 340 P01 0951 0D8C50 P01 0951 340 ldi num_ms,80 ; preset ms request 341 P01 0954 C198 P01 0954 341 call delay_ms ; delay 80ms 342 P01 0956 1FC2 P01 0956 342 ld a,drc ; load contents of c port 343 P01 0958 9F85 P01 0958 343 ld c_copy, a ; keep copy of c port 344 P01 095A 6B85 P01 095A 344 res led_stat,c_copy ; set status led bit low 345 P01 095C 1F85 P01 095C 345 ld a,c_copy ; load copy in acc 346 P01 095E 9FC2 P01 095E 346 ld drc,a ; write complete port at once 347 P01 0960 0D8C50 P01 0960 347 ldi num_ms,80 ; preset ms request 348 P01 0963 C198 P01 0963 348 call delay_ms ; delay 80ms 349 P01 0965 FF87 P01 0965 349 dec K 350 P01 0967 08 P01 0967 350 jrnz bp2 ; K > 0 ? 351 P01 0968 CD P01 0968 351 ret 352 P01 0969 4994 P01 0969 352 bp2 jp bp1 353 353 354 354 ;|---------------------------------------------------------------------------| 355 355 ;| one_sec | 356 356 ;|---------------------------------------------------------------------------| 357 357 ;Subroutine one_sec creates a delay of 1s (at 4 MHz crystal) 358 358 359 P01 096B P01 096B 359 one_sec: ; Software delay 360 P01 096B 0DD8FE P01 096B 360 ldi wdr,0feh ; disable watchdog here 361 P01 096E 0D8064 P01 096E 361 ldi x,100 ; outer loop x (100 times) 362 P01 0971 0D81FF P01 0971 362 ldi y,0ffh ; inner loop y (255 times) 363 P01 0974 5D P01 0974 363 tloop dec y ; tloop represents 12 instruction cycles. 364 P01 0975 04 P01 0975 364 nop ; 365 P01 0976 04 P01 0976 365 nop ; 366 P01 0977 04 P01 0977 366 nop ; 367 P01 0978 D8 P01 0978 367 jrnz tloop ; inner loop 368 P01 0979 0DD8FE P01 0979 368 ldi wdr,0feh ; disable watchdog here 369 P01 097C 1D P01 097C 369 dec x ; outer loop 370 P01 097D B0 P01 097D 370 jrnz tloop ; x>0 => new loop 371 P01 097E CD P01 097E 371 tempend ret ; x reaches 0 => end of one_sec 372 372 373 373 ;|---------------------------------------------------------------------------| 374 374 ;| delay_s | 375 375 ;|---------------------------------------------------------------------------| 376 376 ;Subroutine delay_s uses the one_second sub to create a delay of (num_sec) s 377 377 378 P01 097F 0DD8FE P01 097F 378 delay_s ldi wdr,0feh ; disable watchdog here 379 P01 0982 1F8B P01 0982 379 ld a,num_sec ; load number of seconds to delay 380 P01 0984 9F86 P01 0984 380 ld I,a ; load I loop counter with num_sec 381 P01 0986 B196 P01 0986 381 oneS call one_sec ; delay 1s 382 P01 0988 FF86 P01 0988 382 dec I 383 P01 098A D8 P01 098A 383 jrnz oneS ; I is > 0 384 P01 098B CD P01 098B 384 ret ; end of delay_s 385 385 386 386 ;|---------------------------------------------------------------------------| 387 387 ;| delay_ms | 388 388 ;|---------------------------------------------------------------------------| 389 389 ;Subroutine delay_ms creates a delay of about (num_ms) ms at 4 MHZ crystal Sun Mar 05 16:04:08 2000 file shutter8.lis page 9 SHUTTER PROJECT 390 390 ;uses V and W registers. num_ms must be 1 ... 255 and been loaded before 391 391 ; 392 P01 098C 0D8200 P01 098C 392 delay_ms ldi v,0 ; outer loop v (x num_ms) (4 cyc.) 393 P01 098F 1718 P01 098F 393 d_ms ldi a,24 ; inner loop w (24x14 c.) (4 cyc.) 394 P01 0991 0D8300 P01 0991 394 ldi w,0 ; reset inner loop counter(4 cyc.) 395 P01 0994 0DD8FE P01 0994 395 loop_ms ldi wdr,0feh ; use up time w/dog > (4 cyc.) 396 P01 0997 D5 P01 0997 396 inc w ; increment w > (4 cyc.) 397 P01 0998 3F83 P01 0998 397 cp a,w ; is w=24 ? > (4 cyc.) 398 P01 099A C8 P01 099A 398 jrnz loop_ms ; no, so jump back > (2 cyc.) 399 P01 099B 95 P01 099B 399 inc v ; increment outer loop ct.(4 cyc.) 400 P01 099C 1F8C P01 099C 400 ld a, num_ms ; get preset ms delay (1 to 255) 401 P01 099E 3F82 P01 099E 401 cp a,v ; is it reached ? (4 cyc.) 402 P01 09A0 14 P01 09A0 402 jrz fini_ms ; yes, end (2 cyc.) 403 P01 09A1 F998 P01 09A1 403 jp d_ms ; no, back for another ms (4 cyc.) 404 P01 09A3 CD P01 09A3 404 fini_ms ret ; return from subroutine (2 cyc.) 405 405 406 406 ; 407 407 ;|---------------------------------------------------------------------------| 408 408 ;| ShutL | 409 409 ;|---------------------------------------------------------------------------| 410 410 ;Subroutine ShutL switches off the shutter led and shutter (bit LOW on Port) 411 411 ; 412 412 ; 413 P01 09A4 1FC2 P01 09A4 413 ShutL ld a,drc ; (4 cyc.)load contents of c port 414 P01 09A6 9F85 P01 09A6 414 ld c_copy, a ; (4 cyc.)keep copy of c port 415 P01 09A8 2B85 P01 09A8 415 res shuttr,c_copy ; (4 cyc.)reset shuttr bit 416 P01 09AA 1F85 P01 09AA 416 ld a,c_copy ; (4 cyc.)load copy in acc 417 P01 09AC 9FC2 P01 09AC 417 ld drc,a ; (4 cyc.) write complete port at once 418 P01 09AE CD P01 09AE 418 ret ; LED/SHUTTER OFF now 419 419 ; 420 420 ;|---------------------------------------------------------------------------| 421 421 ;| ShutH | 422 422 ;|---------------------------------------------------------------------------| 423 423 ;Subroutine ShutH lights the shutter led and sw. shutter ON (bit HI on Port) 424 424 ; 425 425 ; 426 P01 09AF 1FC2 P01 09AF 426 ShutH ld a,drc ; (4 cyc.)load contents of c port 427 P01 09B1 9F85 P01 09B1 427 ld c_copy, a ; (4 cyc.)keep copy of c port 428 P01 09B3 3B85 P01 09B3 428 set shuttr,c_copy ; (4 cyc.)set shuttr bit 429 P01 09B5 1F85 P01 09B5 429 ld a,c_copy ; (4 cyc.)load copy in acc 430 P01 09B7 9FC2 P01 09B7 430 ld drc,a ; (4 cyc.) write complete port at once 431 P01 09B9 CD P01 09B9 431 ret ; LED/SHUTTER ON now 432 432 433 433 ; 434 434 ;|---------------------------------------------------------------------------| 435 435 ;| Stat_Off | 436 436 ;|---------------------------------------------------------------------------| 437 437 ;Subroutine Stat_Off switches off the status led (LOW on Port) 438 438 ; 439 439 ; 440 P01 09BA 1FC2 P01 09BA 440 Stat_Off ld a,drc ; (4 cyc.)load contents of c port 441 P01 09BC 9F85 P01 09BC 441 ld c_copy, a ; (4 cyc.)keep copy of c port 442 P01 09BE 6B85 P01 09BE 442 res led_stat,c_copy ; (4 cyc.)reset led_stat bit 443 P01 09C0 1F85 P01 09C0 443 ld a,c_copy ; (4 cyc.)load copy in acc 444 P01 09C2 9FC2 P01 09C2 444 ld drc,a ; (4 cyc.) write complete port at once 445 P01 09C4 CD P01 09C4 445 ret ; status LED OFF now 446 446 ; 447 447 ;|---------------------------------------------------------------------------| 448 448 ;| Stat_On | 449 449 ;|---------------------------------------------------------------------------| Sun Mar 05 16:04:08 2000 file shutter8.lis page 10 SHUTTER PROJECT 450 450 ;Subroutine Stat_On lights the status led (HI on PortC) 451 451 ; 452 452 ; 453 P01 09C5 1FC2 P01 09C5 453 Stat_On ld a,drc ; (4 cyc.)load contents of c port 454 P01 09C7 9F85 P01 09C7 454 ld c_copy, a ; (4 cyc.)work on a copy of c port 455 P01 09C9 7B85 P01 09C9 455 set led_stat,c_copy ; (4 cyc.)set led_stat bit 456 P01 09CB 1F85 P01 09CB 456 ld a,c_copy ; (4 cyc.)load copy in acc 457 P01 09CD 9FC2 P01 09CD 457 ld drc,a ; (4 cyc.)write complete port at once 458 P01 09CF CD P01 09CF 458 ret ; status LED ON now 459 459 ; 460 460 ;|---------------------------------------------------------------------------| 461 461 ;| flashOff | 462 462 ;|---------------------------------------------------------------------------| 463 463 ;Subroutine flashOff resets the flash bit (LOW on Port) 464 464 ; 465 465 ; 466 P01 09D0 1FC2 P01 09D0 466 flashOff ld a,drc ; (4 cyc.)load contents of c port 467 P01 09D2 9F85 P01 09D2 467 ld c_copy, a ; (4 cyc.)work on a copy of c port 468 P01 09D4 AB85 P01 09D4 468 res flash,c_copy ; (4 cyc.)reset flash bit 469 P01 09D6 1F85 P01 09D6 469 ld a,c_copy ; (4 cyc.)load copy in acc 470 P01 09D8 9FC2 P01 09D8 470 ld drc,a ; (4 cyc.)write complete port at once 471 P01 09DA CD P01 09DA 471 ret ; flash bit OFF now 472 472 ; 473 473 ;|---------------------------------------------------------------------------| 474 474 ;| flashOn | 475 475 ;|---------------------------------------------------------------------------| 476 476 ;Subroutine flashOn sets the flash bit (HI on PortC) 477 477 ; 478 478 ; 479 P01 09DB 1FC2 P01 09DB 479 flashOn ld a,drc ; (4 cyc.)load contents of c port 480 P01 09DD 9F85 P01 09DD 480 ld c_copy, a ; (4 cyc.)keep copy of c port 481 P01 09DF BB85 P01 09DF 481 set flash,c_copy ; (4 cyc.)set flash bit 482 P01 09E1 1F85 P01 09E1 482 ld a,c_copy ; (4 cyc.)load copy in acc 483 P01 09E3 9FC2 P01 09E3 483 ld drc,a ; (4 cyc.) write complete port at once 484 P01 09E5 CD P01 09E5 484 ret ; flash bit ON now 485 485 486 486 ;|---------------------------------------------------------------------------| 487 487 ;| BCD_sec | 488 488 ;|---------------------------------------------------------------------------| 489 489 ; 490 490 ;Subroutine BCD_sec reads Ports B and A in case of full seconds 491 491 ;selected by the HEX switch (0 X X X) allowed are 0-001 to 0-255 492 492 ;Note: switch is ON-GND, meaning a bit position "0" must be inverted to "1" 493 P01 09E6 0DD8FE P01 09E6 493 BCD_sec ldi wdr,0feh ; disable watchdog here 494 P01 09E9 1FC1 P01 09E9 494 ld a,drb ; read Port B (Hex-BCD1) 495 P01 09EB 2D P01 09EB 495 com a ; complement (an ON to GND means bit HI) 496 P01 09EC 4C P01 09EC 496 jrz bcd1_ok ; zero,acc =00000000 is valid (Hex-0 BCD1-0) 497 P01 09ED 3701 P01 09ED 497 cpi a,1 ; test if BCD1 is 1 498 P01 09EF 34 P01 09EF 498 jrz bcd1_ok ; yes, acc =00000001 is valid (Hex-0 BDC1-1) 499 P01 09F0 3702 P01 09F0 499 cpi a,2 ; test if BCD1 is 2 500 P01 09F2 1C P01 09F2 500 jrz bcd1_ok ; yes, acc =00000010 is valid (Hex-0 BDC1-2) / 501 P01 09F3 1194 P01 09F3 501 call errStat ; no setup is not [0]-0xx to [0]-2xx, error 502 P01 09F5 CD P01 09F5 502 ret ; back after status error blinking 503 P01 09F6 9F88 P01 09F6 503 bcd1_ok ld b1, a ; save valid hundreds (b1) setting 504 P01 09F8 0DD8FE P01 09F8 504 ldi wdr,0feh ; disable watchdog here 505 P01 09FB 1FC0 P01 09FB 505 ld a,dra ; read port A (BCD2-BCD3) 506 P01 09FD 37FF P01 09FD 506 cpi a,11111111b ; port A reads "0" and "0" ? 507 P01 09FF 14 P01 09FF 507 jrz allnull ; yes if BCD1 is also 0 ->error 508 P01 0A00 89A0 P01 0A00 508 jp bcd23_v ; no, we have a correct setting Sun Mar 05 16:04:08 2000 file shutter8.lis page 11 SHUTTER PROJECT 509 P01 0A02 1F88 P01 0A02 509 allnull ld a,b1 ; BCD1,BCD2 and BCD3 = 0 ? 510 P01 0A04 18 P01 0A04 510 jrnz bcd23_v ; no, we have a valid setting (100 or 200) / 511 P01 0A05 1194 P01 0A05 511 call errStat ; yes, incorrect setting (0-000) 512 P01 0A07 CD P01 0A07 512 ret ; back after status error blinking 513 P01 0A08 1FC0 P01 0A08 513 bcd23_v ld a, dra ; load the acc again (BCD2 and BCD3) 514 P01 0A0A B7F0 P01 0A0A 514 andi a,11110000b ; mask the lower nibble of BCD3 switch 515 P01 0A0C AD P01 0A0C 515 rlc a ; rotate left through carry 516 P01 0A0D AD P01 0A0D 516 rlc a ; rotate left through carry 517 P01 0A0E AD P01 0A0E 517 rlc a ; rotate left through carry 518 P01 0A0F AD P01 0A0F 518 rlc a ; rotate left through carry 519 P01 0A10 AD P01 0A10 519 rlc a ; shift higher nibble to lower 520 P01 0A11 B70F P01 0A11 520 andi a,00001111b ; clear eventual carry bit 521 P01 0A13 2D P01 0A13 521 com a ; complement acc 522 P01 0A14 B70F P01 0A14 522 andi a,00001111b ; do use only lower nibble here 523 P01 0A16 9F89 P01 0A16 523 ld b2, a ; save valid b2 setting 524 P01 0A18 0DD8FE P01 0A18 524 ldi wdr,0feh ; disable watchdog here 525 P01 0A1B 1FC0 P01 0A1B 525 ld a,dra ; read port A again for lower nibble 526 P01 0A1D B70F P01 0A1D 526 andi a,00001111b ; mask higher nibble 527 P01 0A1F 2D P01 0A1F 527 com a ; complement acc 528 P01 0A20 B70F P01 0A20 528 andi a,00001111b ; use only lower nibble here 529 P01 0A22 9F8A P01 0A22 529 ld b3, a ; save valid b3 setting 530 530 ; setting in b1,b2,b3 now 531 531 ; calculate num_sec next 532 P01 0A24 1F88 P01 0A24 532 ld a,b1 ; load b1 533 P01 0A26 3702 P01 0A26 533 cpi a,2 ; is it 2 ? 534 P01 0A28 2C P01 0A28 534 jrz t2xx ; yes, add 200 to num_sec 535 P01 0A29 3701 P01 0A29 535 cpi a,1 ; ist it 1 ? 536 P01 0A2B 54 P01 0A2B 536 jrz t1xx ; yes, add 100 to num_sec 537 P01 0A2C 99A3 P01 0A2C 537 jp tens ; b1 is 0, so go to tens position 538 P01 0A2E 0D8BC8 P01 0A2E 538 t2xx ldi num_sec,200 ; load 200 to num_sec 539 P01 0A31 0DD8FE P01 0A31 539 ldi wdr,0feh ; disable watchdog here 540 P01 0A34 99A3 P01 0A34 540 jp tens ; add number of ten's 541 P01 0A36 0D8B64 P01 0A36 541 t1xx ldi num_sec,100 ; load 100 to num_sec 542 P01 0A39 1F89 P01 0A39 542 tens ld a,b2 ; load 10's position 543 P01 0A3B 64 P01 0A3B 543 jrz ones ; add one's 544 P01 0A3C 7D P01 0A3C 544 ld y,a ; load counter y with 1...9 545 P01 0A3D 0DD8FE P01 0A3D 545 tensloop ldi wdr,0feh ; disable watchdog here 546 P01 0A40 170A P01 0A40 546 ldi a,10 ; add 10 547 P01 0A42 5F8B P01 0A42 547 add a,num_sec ; add num_sec+10 in accumulator 548 P01 0A44 9F8B P01 0A44 548 ld num_sec, a ; put result back to num_sec 549 P01 0A46 5D P01 0A46 549 dec y ; decrement counter for 10's to add 550 P01 0A47 A8 P01 0A47 550 jrnz tensloop ; add as many 10's as b2 says 551 P01 0A48 0DD8FE P01 0A48 551 ones ldi wdr,0feh ; disable watchdog here 552 P01 0A4B 1F8A P01 0A4B 552 ld a,b3 ; one's to add 553 P01 0A4D 24 P01 0A4D 553 jrz ns_ok ; no ones to add 554 P01 0A4E 5F8B P01 0A4E 554 add a,num_sec ; add num_sec+b3 (ones) in acc 555 P01 0A50 9F8B P01 0A50 555 ld num_sec, a ; put result back to num_sec 556 P01 0A52 F19A P01 0A52 556 ns_ok call ShutH ; SHUTTER OPENS HERE 557 P01 0A54 F197 P01 0A54 557 call delay_s ; sub delays for num_secs 558 P01 0A56 11B6 P01 0A56 558 call flash_it ; make flash impulse of 20ms before closing 559 P01 0A58 419A P01 0A58 559 call ShutL ; SHUTTER CLOSES AGAIN 560 P01 0A5A CD P01 0A5A 560 ret 561 561 562 562 ;|---------------------------------------------------------------------------| 563 563 ;| chk_frac | 564 564 ;|---------------------------------------------------------------------------| 565 565 ; 566 566 ;Subroutine chk_frac checks Ports B and A in case of fractional second mode 567 567 ;selected by the HEX switch (A-XXX) / (D-XXX) / (E-XXX) / (F-XXX) Sun Mar 05 16:04:08 2000 file shutter8.lis page 12 SHUTTER PROJECT 568 568 ;and sets the err_flag on return, if the switch setting is not ok 569 569 570 P01 0A5B 0DD8FE P01 0A5B 570 chk_frac ldi wdr,0feh ; disable watchdog here 571 P01 0A5E 1FC1 P01 0A5E 571 ld a,drb ; read Port B 572 P01 0A60 2D P01 0A60 572 com a ; complement it (digital switches to GND) 573 P01 0A61 B70F P01 0A61 573 andi a,00001111b ; mask the 4 MSB's of the Hex code sw. 574 P01 0A63 3701 P01 0A63 574 cpi a,1 ; compare with 1 decimal 575 P01 0A65 3C P01 0A65 575 jrz chk1_1 ; BCD1 switch is set to 1 576 P01 0A66 3700 P01 0A66 576 cpi a,0 ; compare with 0 577 P01 0A68 14 P01 0A68 577 jrz cgo1_0 ; BCD1 switch is set to 0 578 P01 0A69 19AA P01 0A69 578 jp err_set ; BCD1 not 1 and not 0 ->set error flag 579 P01 0A6B A9A7 P01 0A6B 579 cgo1_0 jp chk1_0 ; prevent 5-bit displacement overflow 580 P01 0A6D 0DD8FE P01 0A6D 580 chk1_1 ldi wdr,0feh ; disable watchdog here 581 P01 0A70 1FC0 P01 0A70 581 ld a,dra ; read port A 582 P01 0A72 2D P01 0A72 582 com a ; complement it 583 P01 0A73 3725 P01 0A73 583 cpi a,00100101b ; port A reads "2" and "5" ? 584 P01 0A75 14 P01 0A75 584 jrz ok128 ; yes, is 1/125 second 585 P01 0A76 19AA P01 0A76 585 jp err_set ; incorrect setting (not 1/125) 586 P01 0A78 59AA P01 0A78 586 ok128 jp err_res ; no error in sw setting 587 P01 0A7A 0DD8FE P01 0A7A 587 chk1_0 ldi wdr,0feh ; disable watchdog here 588 P01 0A7D 1FC0 P01 0A7D 588 ld a,dra ; read Port A for next 2 switches 589 P01 0A7F 2D P01 0A7F 589 com a ; complement it 590 P01 0A80 3760 P01 0A80 590 cpi a,01100000b ; test for "6" and "0" ? 591 P01 0A82 10 P01 0A82 591 jrnz ckxt01 ; no, next test 592 P01 0A83 59AA P01 0A83 592 jp err_res ; yes, setting ok 593 P01 0A85 3730 P01 0A85 593 ckxt01 cpi a,00110000b ; test for "3" and "0" ? 594 P01 0A87 10 P01 0A87 594 jrnz ckxt02 ; no, next test 595 P01 0A88 59AA P01 0A88 595 jp err_res ; yes, ok 1/30 second 596 P01 0A8A 3716 P01 0A8A 596 ckxt02 cpi a,00010110b ; test for "1" and "6" ? 597 P01 0A8C 10 P01 0A8C 597 jrnz ckxt03 ; no, next test 598 P01 0A8D 59AA P01 0A8D 598 jp err_res ; yes, ok 1/16 second 599 P01 0A8F 3708 P01 0A8F 599 ckxt03 cpi a,00001000b ; test for "0" and "8" ? 600 P01 0A91 10 P01 0A91 600 jrnz ckxt04 ; no, next test 601 P01 0A92 59AA P01 0A92 601 jp err_res ; yes, no error 602 P01 0A94 3704 P01 0A94 602 ckxt04 cpi a,00000100b ; test for "0" and "4" ? 603 P01 0A96 10 P01 0A96 603 jrnz ckxt05 ; no, next test 604 P01 0A97 59AA P01 0A97 604 jp err_res ; yes no error 605 P01 0A99 3702 P01 0A99 605 ckxt05 cpi a,00000010b ; test for "0" and "2" ? 606 P01 0A9B 10 P01 0A9B 606 jrnz ckxt06 ; no, last test 607 P01 0A9C 59AA P01 0A9C 607 jp err_res ; yes no error 608 P01 0A9E 3701 P01 0A9E 608 ckxt06 cpi a,00000001b ; test for "0" and "1" ? 609 P01 0AA0 24 P01 0AA0 609 jrz err_res ; yes, last test ok 610 P01 0AA1 0D8D01 P01 0AA1 610 err_set ldi err_flag,1 ; no, all other settings incorrect 611 P01 0AA4 CD P01 0AA4 611 ret ; and go back 612 P01 0AA5 0D8D00 P01 0AA5 612 err_res clr err_flag ; clear the error flag 613 P01 0AA8 CD P01 0AA8 613 ret ; and go back 614 614 615 615 ;|---------------------------------------------------------------------------| 616 616 ;| BCD_frac | 617 617 ;|---------------------------------------------------------------------------| 618 618 ; 619 619 ;Subroutine BCD_frac reads Ports B and A in case of fractional second mode 620 620 ;selected by the HEX switch (A-XXX) / (D-XXX) / (E-XXX) / (F-XXX) 621 621 ; 622 P01 0AA9 0DD8FE P01 0AA9 622 BCD_frac ldi wdr,0feh ; disable watchdog here 623 P01 0AAC 1FC1 P01 0AAC 623 ld a,drb ; read Port B 624 P01 0AAE 2D P01 0AAE 624 com a ; complement it (digital switches to GND) 625 P01 0AAF B70F P01 0AAF 625 andi a,00001111b ; mask the 4 MSB's of the Hex code sw. 626 P01 0AB1 3701 P01 0AB1 626 cpi a,1 ; compare with 1 decimal 627 P01 0AB3 44 P01 0AB3 627 jrz bcd1_1 ; BCD1 switch is set to 1 Sun Mar 05 16:04:08 2000 file shutter8.lis page 13 SHUTTER PROJECT 628 P01 0AB4 3700 P01 0AB4 628 cpi a,0 ; compare with 0 629 P01 0AB6 1C P01 0AB6 629 jrz go1_0 ; BCD1 switch is set to 0 630 P01 0AB7 1194 P01 0AB7 630 call errStat ; BCD1 switch not 1 and not 0 ->error 631 P01 0AB9 CD P01 0AB9 631 ret ; back after error signaling 632 P01 0ABA E9AC P01 0ABA 632 go1_0 jp bcd1_0 ; prevent 5-bit displacement overflow 633 P01 0ABC 0DD8FE P01 0ABC 633 bcd1_1 ldi wdr,0feh ; disable watchdog here 634 P01 0ABF 1FC0 P01 0ABF 634 ld a,dra ; read port A 635 P01 0AC1 2D P01 0AC1 635 com a ; complement it 636 P01 0AC2 3725 P01 0AC2 636 cpi a,00100101b ; port A reads "2" and "5" ? 637 P01 0AC4 1C P01 0AC4 637 jrz do128 ; yes, do 1/125 second 638 P01 0AC5 1194 P01 0AC5 638 call errStat ; incorrect setting (not 1/125) 639 P01 0AC7 CD P01 0AC7 639 ret ; back after error signaling 640 P01 0AC8 0D8401 P01 0AC8 640 do128 ldi d128fac,1 ; setup correct delay factor for sub 641 P01 0ACB 01B3 P01 0ACB 641 call delay_128 ; subroutine delay_128 does it 642 P01 0ACD CD P01 0ACD 642 ret ; back after 1/125 sec 643 P01 0ACE 0DD8FE P01 0ACE 643 bcd1_0 ldi wdr,0feh ; disable watchdog here 644 P01 0AD1 1FC0 P01 0AD1 644 ld a,dra ; read Port A for next 2 switches 645 P01 0AD3 2D P01 0AD3 645 com a ; complement it 646 P01 0AD4 3760 P01 0AD4 646 cpi a,01100000b ; test for "6" and "0" ? 647 P01 0AD6 14 P01 0AD6 647 jrz cp01 ; yes, do 1/60 second 648 P01 0AD7 B9AD P01 0AD7 648 jp next01 ; no, goto next comparison 649 P01 0AD9 69B0 P01 0AD9 649 cp01 jp do60 ; subroutine makes 1/60 s 650 P01 0ADB 3730 P01 0ADB 650 next01 cpi a,00110000b ; test for "3" and "0" ? 651 P01 0ADD 14 P01 0ADD 651 jrz cp02 652 P01 0ADE 29AE P01 0ADE 652 jp next02 653 P01 0AE0 C9B0 P01 0AE0 653 cp02 jp do30 ; yes, do 1/30 second 654 P01 0AE2 3716 P01 0AE2 654 next02 cpi a,00010110b ; test for "1" and "6" ? 655 P01 0AE4 14 P01 0AE4 655 jrz cp03 ; yes, do 1/16 second 656 P01 0AE5 99AE P01 0AE5 656 jp next03 657 P01 0AE7 29B1 P01 0AE7 657 cp03 jp do16 658 P01 0AE9 3708 P01 0AE9 658 next03 cpi a,00001000b ; test for "0" and "8" ? 659 P01 0AEB 14 P01 0AEB 659 jrz cp04 ; yes, do 1/8 second 660 P01 0AEC 09AF P01 0AEC 660 jp next04 661 P01 0AEE 89B1 P01 0AEE 661 cp04 jp do8 662 P01 0AF0 3704 P01 0AF0 662 next04 cpi a,00000100b ; test for "0" and "4" ? 663 P01 0AF2 14 P01 0AF2 663 jrz cp05 ; yes, do 1/4 second 664 P01 0AF3 79AF P01 0AF3 664 jp next05 665 P01 0AF5 E9B1 P01 0AF5 665 cp05 jp do4 666 P01 0AF7 3702 P01 0AF7 666 next05 cpi a,00000010b ; test for "0" and "2" ? 667 P01 0AF9 14 P01 0AF9 667 jrz cp06 ; yes, do 1/2 second 668 P01 0AFA E9AF P01 0AFA 668 jp next06 669 P01 0AFC 49B2 P01 0AFC 669 cp06 jp do2 670 P01 0AFE 3701 P01 0AFE 670 next06 cpi a,00000001b ; test for "0" and "1" ? 671 P01 0B00 1C P01 0B00 671 jrz cp07 ; yes, do 1/1 second 672 P01 0B01 1194 P01 0B01 672 call errStat ; no, all other settings incorrect 673 P01 0B03 CD P01 0B03 673 ret 674 P01 0B04 A9B2 P01 0B04 674 cp07 jp do1 675 P01 0B06 0D8402 P01 0B06 675 do60 ldi d128fac,2 ; setup correct delay factor for sub 676 P01 0B09 01B3 P01 0B09 676 call delay_128 ; subroutine for 2/128 = 1/64s 677 P01 0B0B CD P01 0B0B 677 ret 678 P01 0B0C 0D8404 P01 0B0C 678 do30 ldi d128fac,4 ; setup correct delay factor for sub 679 P01 0B0F 01B3 P01 0B0F 679 call delay_128 ; subroutine for 4/128 = 1/32s 680 P01 0B11 CD P01 0B11 680 ret 681 P01 0B12 0D8408 P01 0B12 681 do16 ldi d128fac,8 ; setup correct delay factor for sub 682 P01 0B15 01B3 P01 0B15 682 call delay_128 ; subroutine for 8/128 = 1/16s 683 P01 0B17 CD P01 0B17 683 ret 684 P01 0B18 0D8410 P01 0B18 684 do8 ldi d128fac,16 ; setup correct delay factor for sub 685 P01 0B1B 01B3 P01 0B1B 685 call delay_128 ; subroutine for 16/128 = 1/8s 686 P01 0B1D CD P01 0B1D 686 ret 687 P01 0B1E 0D8420 P01 0B1E 687 do4 ldi d128fac,32 ; setup correct delay factor for sub Sun Mar 05 16:04:08 2000 file shutter8.lis page 14 SHUTTER PROJECT 688 P01 0B21 01B3 P01 0B21 688 call delay_128 ; subroutine for 32/128 = 1/4s 689 P01 0B23 CD P01 0B23 689 ret 690 P01 0B24 0D8440 P01 0B24 690 do2 ldi d128fac,64 ; setup correct delay factor for sub 691 P01 0B27 01B3 P01 0B27 691 call delay_128 ; subroutine for 64/128 = 1/2s 692 P01 0B29 CD P01 0B29 692 ret 693 P01 0B2A 0D8480 P01 0B2A 693 do1 ldi d128fac,128 ; setup correct delay factor for sub 694 P01 0B2D 01B3 P01 0B2D 694 call delay_128 ; subroutine for 128/128 = 1/1s 695 P01 0B2F CD P01 0B2F 695 ret 696 696 697 697 ;|---------------------------------------------------------------------------| 698 698 ;| delay_128 | 699 699 ;|---------------------------------------------------------------------------| 700 700 ; 701 701 ;Subroutine delay_128 opens shutter for (d128fac) * 1/128 s 702 702 ; 703 P01 0B30 0DD8FE P01 0B30 703 delay_128 ldi wdr,0feh ; disable watchdog here 704 P01 0B33 1F84 P01 0B33 704 ld a,d128fac ; (4 cyc.) load the factor in a 705 P01 0B35 9F87 P01 0B35 705 ld K,a ; (4 cyc.) put factor in K 706 P01 0B37 1FC2 P01 0B37 706 ld a,drc ; load contents of c port 707 P01 0B39 9F85 P01 0B39 707 ld c_copy, a ; keep copy of c port 708 P01 0B3B 3B85 P01 0B3B 708 set shuttr,c_copy ; set shutter (shutter led) bit 709 P01 0B3D 1F85 P01 0B3D 709 ld a,c_copy ; load copy in acc 710 P01 0B3F 9FC2 P01 0B3F 710 ld drc,a ; write complete port at once 711 711 ; SHUTTER OPENS HERE 712 712 ; must use up K * 2404 cycles now ! 713 P01 0B41 04 P01 0B41 713 begin_0 nop ; (2 cyc.) 714 P01 0B42 0D8600 P01 0B42 714 ldi I,0 ; (4 cyc.) reset loop counter I (4 cyc.) 715 P01 0B45 17A9 P01 0B45 715 ldi a,169 ; (4 cyc.) loop factor 169 716 P01 0B47 0DD8FE P01 0B47 716 wait_10 ldi wdr,0feh ; (4 cyc.)\ 717 P01 0B4A 7F86 P01 0B4A 717 inc I ; (4 cyc.) \ 718 P01 0B4C 3F86 P01 0B4C 718 cp a,I ; (4 cyc.) >14 cycles inner loop 719 P01 0B4E C0 P01 0B4E 719 jrnz wait_10 ; (2 cyc.) / times 169 = 2366 cycles 720 P01 0B4F FF87 P01 0B4F 720 dec K ; (4 cyc.) 721 P01 0B51 14 P01 0B51 721 jrz done ; (2 cyc.) 722 P01 0B52 19B4 P01 0B52 722 jp begin_0 ; (2 cyc.) 723 P01 0B54 11B6 P01 0B54 723 done call flash_it ; in all cases use the flash 20 ms 724 P01 0B56 1FC2 P01 0B56 724 ld a,drc ; (4 cyc.) load contents of c port 725 P01 0B58 9F85 P01 0B58 725 ld c_copy, a ; (4 cyc.) keep copy of c port 726 P01 0B5A 2B85 P01 0B5A 726 res shuttr,c_copy ; (4 cyc.) reset the shutter/led bit 727 P01 0B5C 1F85 P01 0B5C 727 ld a,c_copy ; (4 cyc.) load copy in acc 728 P01 0B5E 9FC2 P01 0B5E 728 ld drc,a ; (4 cyc.) write complete port at once 729 729 730 P01 0B60 CD P01 0B60 730 ret ; SHUTTER CLOSES HERE 731 731 732 732 ;|---------------------------------------------------------------------------| 733 733 ;| flash_it | 734 734 ;|---------------------------------------------------------------------------| 735 735 ; 736 736 ;Subroutine flash_it sets the flash output ON for 20ms 737 P01 0B61 B19D P01 0B61 737 flash_it call flashOn ; flash output ON 738 P01 0B63 0D8C14 P01 0B63 738 ldi num_ms,20 ; preset ms request 739 P01 0B66 C198 P01 0B66 739 call delay_ms ; delay 20ms 740 P01 0B68 019D P01 0B68 740 call flashOff ; flash output OFF 741 741 742 742 ; **************************** 743 743 ; **************************** 744 744 ; ** SYSTEM ROUTINES AREA ** 745 745 ; **************************** 746 746 ; **************************** 747 747 Sun Mar 05 16:04:08 2000 file shutter8.lis page 15 SHUTTER PROJECT 748 748 ; ***************************** 749 749 ; * RESET: * 750 750 ; ***************************** 751 751 752 P01 0B6A 0980 P01 0B6A 752 reset jp init 753 753 754 754 ; ***************************** 755 755 ; * RESET/NMI VECTORS * 756 756 ; ***************************** 757 757 758 758 ;section 32 begins at 0ff0h 759 759 .SECTION 32 760 760 761 761 .block 2 ; vector #4 at address ff0 and ff1 is not used 762 762 ; (ADC peripheral) 763 763 764 P01 0FF2 8991 P01 0FF2 764 irq3 jp tim_int ; vector #3 at FF2h and FF3h is service interr / upt of timer 765 765 766 P01 0FF4 6991 P01 0FF4 766 irq2 jp p_bc_int ; vector #2 at FF4h and FF5h is B/C port pins 767 767 768 P01 0FF6 4991 P01 0FF6 768 irq1 jp p_a_int ; vector #1 at FF6h and FF7h is A port pins / 769 769 770 770 .block 4 ; addresses ff8h to ffBh are blocked (not used / ) 771 771 772 P01 0FFC 2991 P01 0FFC 772 nmi jp nmi_int ; vector #0 at FFCh and FFDh is nmi vector 773 773 774 P01 0FFE A9B6 P01 0FFE 774 vrst jp reset ; this is the reset vector at FFEh and FFFh 775 775 No error detected No warning